Infineon TRAVEO T2G - Page 1090

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
30 ADC_EN RW R 0 Enable the SAR ADC and SAR sequencer (only valid if
ENABLED=1)
- 0: SARADC and SARSEQ are disabled (put
SARADC analog in power down and stop clocks), also
clears all pending triggers.
- 1: SAR ADC and SARSEQ are enabled.
To enable ADC0 to borrow SARMUX1-3 the
corresponding ADC_EN must be set to 0.
31 ENABLED RW R 0 - 0: SAR IP disabled (put analog in power down and
stop clocks), also clears all pending triggers.
- 1: SAR IP enabled.
1090
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers