Infineon TRAVEO T2G - Page 1111

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
16:27 SAMPLE_TIME RW R Undefined Sample time (aperture) in ADC clock cycles. Minimum
is 1 (0 gives the same result as 1), minimum time
needed for proper settling is at least 300ns, i.e. 6 clock
cycles at the max frequency of 20MHz.
31 ALT_CAL RW R Undefined Use alternate calibration values instead of the current
calibration values.
This allows the firmware to allocate one or more
channels to quietly re-calibrate the ADC in the
background of regular processing.
0 = use regular calibration values (ANA/DIG_CAL)
1 = use alternate calibration values
(ANA/DIG_CAL_ALT)
Note: typically calibration measurements select VrefL
(PIN_ADDR=62) or VrefH (PIN_ADDR=63)
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers