Infineon TRAVEO T2G - Page 1680

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
25:26 LOCK_DELAY RW R 0 Configures the sensitivity of the lock detection logic.
0: normal operation
1: reduced sensitivity to allow tracking a modulating
reference clock. When this option is selected,
configure fVCO=320MHz. The PLL can track the a
reference clock frequency that modulates within +/-4
percent at a rate of fREF/1000 MHz.
2,3: reserved (do not use)
27 PLL_LF_MODE RW R 0 VCO frequency range selection. Configure this bit
according to the targeted VCO frequency. Do not
change this setting while the PLL is enabled.
0: VCO frequency is [200MHz, 400MHz]
1: VCO frequency is [170MHz, 200MHz)
28:29 BYPASS_SEL RW R 0 Bypass mux located just after PLL output. This
selection is glitch-free and can be changed while the
PLL is running. When changing BYPASS_SEL, do not
turn off the reference clock or PLL clock for five cycles
(whichever is slower).
AUTO 0 Automatic using lock indicator. When unlocked,
automatically selects PLL reference input (bypass
mode). When locked, automatically selects PLL output.
If ENABLE=0, automatically selects PLL reference
input.
LOCKED_OR_NOTHING 1 Similar to AUTO, except the clock is gated off when
unlocked. This is compatible with clock supervision,
because the supervisors allow no clock during startup
(until a timeout occurs), and the clock targets the
proper frequency whenever it is running. If ENABLE=0,
no clock is output.
PLL_REF 2 Select PLL reference input (bypass mode). Ignores
lock indicator
PLL_OUT 3 Select PLL output. Ignores lock indicator. If
ENABLE=0, no clock is output.
31 ENABLE RW R 0 Master enable for PLL. Setup FEEDBACK_DIV,
REFERENCE_DIV, and OUTPUT_DIV at least one
cycle before setting ENABLE=1.
Fpll = (FEEDBACK_DIV) * (Fref / REFERENCE_DIV) /
(OUTPUT_DIV)
0: Block is disabled. When the PLL disables, hardware
controls the bypass mux as described in
BYPASS_SEL, before disabling the PLL circuit.
1: Block is enabled
1680
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers