Infineon TRAVEO T2G - Page 919

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
MPU_13 13 Bus master 13 MPU. See MPU_0 description.
MPU_14 14 Bus master 14 MPU. See MPU_0 description.
MPU_15 15 Bus master 15 MPU. See MPU_0 description.
CM4_SYS_MPU 16 CM4 system bus AHB-Lite interface MPU. See MPU_0
description.
CM4_CODE_MPU 17 CM4 code bus AHB-Lite interface MPU for non flash
controller accesses. See MPU_0 description.
CM4_CODE_FLASHC
_MPU
18 CM4 code bus AHB-Lite interface MPU for flash
controller accesses. See MPU_0 description.
MS_PPU_4 25 Peripheral interconnect, master interface 4 PPU. See
MS_PPU_0 description.
PERI_ECC 26 Peripheral interconnect, protection structures SRAM,
correctable ECC error:
DATA0[10:0]: Violating address.
DATA1[7:0]: Syndrome of SRAM word.
PERI_NC_ECC 27 Peripheral interconnect, protection structures SRAM,
non-correctable ECC error. See PERI_ECC
description.
MS_PPU_0 28 Peripheral interconnect, master interface 0 PPU.
DATA0[31:0]: Violating address.
DATA1[0]: User read.
DATA1[1]: User write.
DATA1[2]: User execute.
DATA1[3]: Privileged read.
DATA1[4]: Privileged write.
DATA1[5]: Privileged execute.
DATA1[6]: Non-secure.
DATA1[11:8]: Master identifier.
DATA1[15:12]: Protection context identifier.
DATA1[31:28]: '0': master interface, PPU violation, '1':
timeout detected, '2': bus error, other: undefined.
MS_PPU_1 29 Peripheral interconnect, master interface 1 PPU. See
MS_PPU_0 description.
MS_PPU_2 30 Peripheral interconnect, master interface 2 PPU. See
MS_PPU_0 description.
MS_PPU_3 31 Peripheral interconnect, master interface 3 PPU. See
MS_PPU_0 description.
GROUP_FAULT_0 32 Peripheral group 0 fault detection.
DATA0[31:0]: Violating address.
DATA1[0]: User read.
DATA1[1]: User write.
DATA1[2]: User execute.
DATA1[3]: Privileged read.
DATA1[4]: Privileged write.
DATA1[5]: Privileged execute.
DATA1[6]: Non-secure.
DATA1[11:8]: Master identifier.
DATA1[15:12]: Protection context identifier.
DATA1[31:28]: '0': decoder or peripheral bus error,
other: undefined.
GROUP_FAULT_1 33 Peripheral group 1 fault detection. See
GROUP_FAULT_0 description.
GROUP_FAULT_2 34 Peripheral group 2 fault detection. See
GROUP_FAULT_0 description.
GROUP_FAULT_3 35 Peripheral group 3 fault detection. See
GROUP_FAULT_0 description.
GROUP_FAULT_4 36 Peripheral group 4 fault detection. See
GROUP_FAULT_0 description.
919
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers