Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
27 POR_1B_ECC
_CORRECTED
R W 0 Indicates internal ECC found 1b error while
downloading info in POR from NVM to VM and fixed it.
Valid after 2nd, 3rd and 4th POR phases (FUR, IREM
& MMR, SW DOWNLOAD). If Set it is not cleaned till
additional POR (rst_hf_ac_t)
0: No error
1: 1b ECC Error corrected in POR
28 POR_2B_ECC_ERROR R W 0 Indicates an internal ECC error of 2b while
downloading info in POR from NVM to VM.
Valid after 2nd, 3rd and 4th POR phases (FUR, IREM
& MMR, SW DOWNLOAD). If Set it is not cleaned till
additional POR (rst_hf_ac_t)
0: No error
1: ECC 2b Error in POR
29 NATIVE_POR R W 0 Indicates a Native Flash state (UV) or sorted one.
Valid only after 2nd phase of POR (FUR
DOWNLOAD).
Comment: not a retained flop, therefore reset
(rst_hf_act_n) puts it back to 0. If Set it is not cleaned
till additional POR (rst_hf_ac_t)
0: SORTED DEVICE (Non - Native)
1: NATIVE
30 HANG R W 0 After embedded operation (pgm/erase) this flag will tell
if it was successful or failed
0: PASS
1: FAIL
31 BUSY R W 1 Whenever the device is in embedded mode the RDY
goes low. Should be the same as c_interrupt pin of the
IP (but inverted)
1: busy in embedded
0: rdy (high also in erase suspend)
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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