Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
6 CC1_MATCH_UP_EN RW R 1 Enables / disables the compare match 1 event
generation (COUNTER equals CC0 register) when
counting up (STATUS.DOWN = 0) in CNT_UPDN1/2
mode.
'0': compare match 1 event generation disabled when
counting up
'1': compare match 1 event generation enabled when
counting up
This field has a function in PWM and PWM_DT modes
only.
7 CC1_MATCH_DOWN_EN RW R 1 Enables / disables the compare match 1 event
generation (COUNTER equals CC0 register) when
counting down (STATUS.DOWN = 1) in
CNT_UPDN1/2 mode.
'0': compare match 1 event generation disabled when
counting down
'1': compare match 1 event generation enabled when
counting down
This field has a function in PWM and PWM_DT modes
only.
8 PWM_IMM_KILL RW R 0 Specifies whether the kill event immediately
deactivates the 'dt_line_out' and 'dt_line_compl_out'
signals or with the next module clock ('active count'
pre-scaled 'clk_counter').
'0': synchronous kill activation. Deactivates the
'dt_line_out' and 'dt_line_compl_out' signals with the
next module clock ('active count' pre-scaled
'clk_counter').
'1': immediate kill activation. Immediately deactivates
the 'dt_line_out' and 'dt_line_compl_out' signals.
This field has a function in PWM, PWM_DT and
PWM_PR modes only.
9 PWM_STOP_ON_KILL RW R 0 Specifies whether the counter stops on a kill events:
'0': kill event does NOT stop counter.
'1': kill event stops counter.
This field has a function in PWM, PWM_DT and
PWM_PR modes only.
10 PWM_SYNC_KILL RW R 0 Specifies asynchronous/synchronous kill behavior:
'1': synchronous kill mode: the kill event disables the
'dt_line_out' and 'dt_line_compl_out' signals till the
next terminal count event (synchronous kill). In
synchronous kill mode, STOP_EDGE should be
RISING_EDGE.
'0': asynchronous kill mode: the kill event only disables
the 'dt_line_out' and 'dt_line_compl_out' signals when
present. In asynchronous kill mode, STOP_EDGE
should be NO_EDGE_DET.
This field has a function in PWM and PWM_DT modes
only. This field is only used when
PWM_STOP_ON_KILL is '0'.
12:13 PWM_DISABLE_MODE RW R 0 Specifies the behavior of the PWM outputs 'line_out'
and 'line_compl_out' while the TCPWM counter is
disabled (CTL.ENABLED='0') or stopped.
Note: The output signal of this selection can be further
modified by the immediate kill logic and line_out
polarity settings (CTRL.QUAD_ENCODING_MODE).
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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