Infineon TRAVEO T2G - Page 67

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
10 TCF RW1C RW 0 Transmission Cancellation Finished
0= No transmission cancellation finished
1= Transmission cancellation finished
11 TFE RW1C RW 0 Tx FIFO Empty
0= Tx FIFO non-empty
1= Tx FIFO empty
12 TEFN RW1C RW 0 Tx Event FIFO New Entry
0= Tx Event FIFO unchanged
1= Tx Handler wrote Tx Event FIFO element
13 TEFW RW1C RW 0 Tx Event FIFO Watermark Reached
0= Tx Event FIFO fill level below watermark
1= Tx Event FIFO fill level reached watermark
14 TEFF RW1C RW 0 Tx Event FIFO Full
0= Tx Event FIFO not full
1= Tx Event FIFO full
15 TEFL_ RW1C RW 0 Tx Event FIFO Element Lost
0= No Tx Event FIFO element lost
1= Tx Event FIFO element lost, also set after write
attempt to Tx Event FIFO of size zero
16 TSW RW1C RW 0 Timestamp Wraparound
0= No timestamp counter wrap-around
1= Timestamp counter wrapped around
17 MRAF RW1C RW 0 Message RAM Access Failure
The flag is set, when the Rx Handler
- has not completed acceptance filtering or storage of
an accepted message until the arbitration field of the
following message has been received. In this case
acceptance filtering or message storage is aborted and
the Rx Handler starts processing of the following
message.
- was not able to write a message to the Message
RAM. In this case message storage is aborted.
In both cases the FIFO put index is not updated resp.
the New Data flag for a dedicated Rx Buffer is not set,
a partly stored message is overwritten when the next
message is stored to this location.
The flag is also set when the Tx Handler was not able
to read a message from the Message RAM
in time. In this case message transmission is aborted.
In case of a Tx Handler access failure the
M_TTCAN is switched into Restricted Operation Mode
(see Section 3.1.5). To leave Restricted
Operation Mode, the Host CPU has to reset
CCCR.ASM.
0= No Message RAM access failure occurred
1= Message RAM access failure occurred
18 TOO RW1C RW 0 Timeout Occurred
0= No timeout
1= Timeout reached
19 DRX RW1C RW 0 Message stored to Dedicated Rx Buffer
The flag is set whenever a received message has
been stored into a dedicated Rx Buffer.
0= No Rx Buffer updated
1= At least one received message stored into a Rx
Buffer
20 BEC RW1C RW 0 Bit Error Corrected
This bit always reads as 0.
67
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers