Infineon TRAVEO T2G - Page 921

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
FLASHC_CM0_CA_C
_ECC
54 Flash controller, CM0+ cache, correctable ECC error:
DATA0[26:0]: Violating address.
DATA1[6:0]: Syndrome of 32-bit SRAM word (at
address offset 0x0).
DATA1[14:8]: Syndrome of 32-bit SRAM word (at
address offset 0x4).
DATA1[22:16]: Syndrome of 32-bit SRAM word (at
address offset 0x8).
DATA1[30:24]: Syndrome of 32-bit SRAM word (at
address offset 0xc).
FLASHC_CM0_CA_NC
_ECC
55 Flash controller, CM0+ cache, non-correctable ECC
error. See FLASHC_CM0_CA_C_ECC description.
FLASHC_CM4_CA_C
_ECC
56 Flash controller, CM4 cache, correctable ECC error.
See FLASHC_CM0_CA_C_ECC description.
FLASHC_CM4_CA_NC
_ECC
57 Flash controller, CM4 cache, non-correctable ECC
error. See FLASHC_CM0_CA_C_ECC description.
RAMC0_C_ECC 58 System SRAM 0 correctable ECC error:
DATA0[31:0]: Violating address.
DATA1[6:0]: Syndrome of 32-bit SRAM code word.
RAMC0_NC_ECC 59 System SRAM 0 non-correctable ECC error. See
RAMC0_C_ECC description.
RAMC1_C_ECC 60 System SRAM 1 correctable ECC error. See
RAMC0_C_ECC description.
RAMC1_NC_ECC 61 System SRAM 1 non-correctable ECC error. See
RAMC0_C_ECC description.
RAMC2_C_ECC 62 System SRAM 2 correctable ECC error. See
RAMC0_C_ECC description.
RAMC2_NC_ECC 63 System SRAM 2 non-correctable ECC error. See
RAMC0_C_ECC description.
CRYPTO_C_ECC 64 Cryptography SRAM correctable ECC error.
DATA0[31:0]: Violating address.
DATA1[6:0]: Syndrome of Least Significant 32-bit
SRAM.
DATA1[14:8]: Syndrome of Most Significant 32-bit
SRAM.
CRYPTO_NC_ECC 65 Cryptography SRAM non-correctable ECC error. See
CRYPTO_C_ECC description.
DW0_C_ECC 70 DataWire 0 SRAM 1 correctable ECC error:
DATA0[11:0]: Violating DW SRAM address (word
address, assuming byte addressable).
DATA1[6:0]: Syndrome of 32-bit SRAM code word.
DW0_NC_ECC 71 DataWire 0 SRAM 1 non-correctable ECC error. See
DW0_C_ECC description.
DW1_C_ECC 72 DataWire 1 SRAM 1 correctable ECC error. See
DW0_C_ECC description.
DW1_NC_ECC 73 DataWire 1 SRAM 1 non-correctable ECC error. See
DW0_C_ECC description.
FM_SRAM_C_ECC 74 eCT Flash SRAM (for embedded operations)
correctable ECC error:
DATA0[15:0]: Address location in the eCT Flash
SRAM.
DATA1[6:0]: Syndrome of 32-bit SRAM word.
FM_SRAM_NC_ECC 75 eCT Flash SRAM non-correctable ECC error: See
FM_SRAM_C_ECC description.
921
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers