Infineon TRAVEO T2G - Page 922

Technical Reference Manual 002-29852 Rev. *B
Bits Name SW HW Default or
Enum
Description
CAN0_C_ECC 80 CAN controller 0 MRAM correctable ECC error:
DATA0[15:0]: Violating address.
DATA0[22:16]: ECC violating data[38:32] from MRAM.
DATA0[27:24]: Master ID: 0-7 = CAN channel ID within
mxttcanfd cluster, 8 = AHB I/F
DATA1[31:0]: ECC violating data[31:0] from MRAM.
CAN0_NC_ECC 81 CAN controller 0 MRAM non-correctable ECC error:
DATA0[15:0]: Violating address.
DATA0[22:16]: ECC violating data[38:32] from MRAM
(not for Address Error).
DATA0[27:24]: Master ID: 0-7 = CAN channel ID within
mxttcanfd cluster, 8 = AHB I/F
DATA0[30]: Write access, only possible for Address
Error
DATA0[31]: Address Error: a CAN channel did an
MRAM access above MRAM_SIZE
DATA1[31:0]: ECC violating data[31:0] from MRAM
(not for Address Error).
CAN1_C_ECC 82 CAN controller 1 MRAM correctable ECC error. See
CAN0_C_ECC description.
CAN1_NC_ECC 83 CAN controller 1 MRAM non-correctable ECC error.
See CAN0_NC_ECC description.
CAN2_C_ECC 84 CAN controller 2 MRAM correctable ECC error. See
CAN0_C_ECC description.
CAN2_NC_ECC 85 CAN controller 2 MRAM non-correctable ECC error.
See CAN0_NC_ECC description.
SRSS_CSV 90 SRSS Clock SuperVisor (CSV) violation detected.
Multiple CSV can detect a violation at the same time.
DATA0[15:0]: CSV violation occurred on
corresponding clk_hf* root clock
DATA0[24]: CSV violation occurred on reference clock
for clk_hf CSVs
DATA0[25]: CSV violation occurred on clk_lf
DATA0[26]: CSV violation occurred on clk_ilo0
SRSS_SSV 91 SRSS Supply SuperVisor (SSV) violation detected.
Multiple SSV can detect a violation at the same time.
DATA0[0]: BOD detected on VDDA
DATA0[1]: OVD detected on VDDA
DATA0[16]: violation detected on LVD/HVD #1
DATA0[17]: violation detected on LVD/HVD #2
SRSS_MCWDT0 92 SRSS Multi-Counter Watch Dog Timer (MCWDT) #0
violation detected. Multiple counters can detect a
violation at the same time.
DATA0[0]: MCWDT subcounter 0 LOWER_LIMIT
DATA0[1]: MCWDT subcounter 0 UPPER_LIMIT
DATA0[2]: MCWDT subcounter 1 LOWER_LIMIT
DATA0[3]: MCWDT subcounter 1 UPPER_LIMIT
SRSS_MCWDT1 93 SRSS Multi-Counter Watch Dog Timer (MCWDT) #1
violation detected. See SRSS_MCWDT0 description.
SRSS_MCWDT2 94 SRSS Multi-Counter Watch Dog Timer (MCWDT) #2
violation detected. See SRSS_MCWDT0 description.
SRSS_MCWDT3 95 SRSS Multi-Counter Watch Dog Timer (MCWDT) #3
violation detected. See SRSS_MCWDT0 description.
922
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers