RM0046 Interrupt Controller (INTC)
Doc ID 16912 Rev 5 237/936
OSEK uses the GetResource and ReleaseResource system services to manage access to
a shared resource. To prevent corruption of a coherent data block, modifications to PRI in
INTC_CPR can be made by those system services with the code sequence:
disable processor recognition of interrupts
PRI modification
enable processor recognition of interrupts
9.7.6 Selecting priorities according to request rates and deadlines
The selection of the priorities for the ISRs can be made using rate monotonic scheduling
(RMS) or a superset of it, deadline monotonic scheduling (DMS). In RMS, the ISRs that
have higher request rates have higher priorities. In DMS, if the deadline is before the next
time the ISR is requested, then the ISR is assigned a priority according to the time from the
request for the ISR to the deadline, not from the time of the request for the ISR to the next
request for it.
For example, ISR1 executes every 100 µs, ISR2 executes every 200 µs, and ISR3 executes
every 300 µs. ISR1 has a higher priority than ISR2, which has a higher priority than ISR3;
however, if ISR3 has a deadline of 150 µs, then it has a higher priority than ISR2.
The INTC has 16 priorities, which may be less than the number of ISRs. In this case, the
ISRs should be grouped with other ISRs that have similar deadlines. For example, a priority
could be allocated for every time the request rate doubles. ISRs with request rates around
1 ms would share a priority, ISRs with request rates around 500 µs would share a priority,
ISRs with request rates around 250 µs would share a priority, etc. With this approach, a
range of ISR request rates of 2
16
could be included, regardless of the number of ISRs.
Reducing the number of priorities reduces the processor’s ability to meet its deadlines.
However, reducing the number of priorities can reduce the size and latency through the
interrupt controller. It also allows easier management of ISRs with similar deadlines that
share a resource. They do not need to use the PCP to access the shared resource.
9.7.7 Software configurable interrupt requests
The software configurable interrupt requests can be used in two ways. They can be used to
schedule a lower priority portion of an ISR and they may also be used by processors to
interrupt other processors in a multiple processor system.
Scheduling a lower priority portion of an ISR
A portion of an ISR needs to be executed at the PRIx value in INTC Priority Select Registers
(INTC_PSR0_3–INTC_PSR220_221), which becomes the PRI value in INTC_CPR with the
interrupt acknowledge. The ISR, however, can have a portion that does not need to be
executed at this higher priority. Therefore, executing the later portion that does not need to
be executed at this higher priority can prevent the execution of ISRs that do not have a
higher priority than the earlier portion of the ISR but do have a higher priority than what the
later portion of the ISR needs. This preemptive scheduling inefficiency reduces the
processor’s ability to meet its deadlines.
One option is for the ISR to complete the earlier higher priority portion, but then schedule
through the RTOS a task to execute the later lower priority portion. However, some RTOSs
can require a large amount of time for an ISR to schedule a task. Therefore, a second option
is for the ISR, after completing the higher priority portion, to set a SETx bit in
INTC_SSCIR0_3–INTC_SSCIR4_7. Writing a ‘1’ to SETx causes a software configurable
interrupt request. This software configurable interrupt request will usually have a lower PRIx
To Next Page
Loading...
Need help?
General
