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ST SPC560P34 - Table 362. Interrupt Summary; Clocks

ST SPC560P34
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RM0046 FlexPWM
Doc ID 16912 Rev 5 701/936
The PWM generator uses the last values loaded if RUN is cleared and then set while LDOK
equals zero.
When the RUN bit is cleared:
The RF flag and pending CPU interrupt requests are not cleared
All fault circuitry remains active
Software/external output control remains active
Deadtime insertion continues during software/external output control
25.10 Clocks
25.11 Interrupts
Each of the submodules within the PWM can generate an interrupt from several sources.
The fault logic can also generate interrupts. The interrupt service routine (ISR) must check
the related interrupt enables and interrupt flags to determine the actual cause of the
interrupt.
Table 362. Interrupt summary
Core
interrupt
flag
Interrupt
flag
Interrupt
enable
Name Description
COF0 CMPF_0 CMPIE_0 Submodule 0 compare interrupt Compare event has occurred
RF0 RF_0 RIE_0 Submodule 0 reload interrupt Reload event has occurred
COF1 CMPF_1 CMPIE_1 Submodule 1 compare interrupt Compare event has occurred
RF1 RF_1 RIE_1 Submodule 1 reload interrupt Reload event has occurred
COF2 CMPF_2 CMPIE_2 Submodule 2 compare interrupt Compare event has occurred
RF2 RF_2 RIE_2 Submodule 2 reload interrupt Reload event has occurred
COF3 CMPF_3 CMPIE_3 Submodule 3 compare interrupt Compare event has occurred
RF3 RF_3 RIE_3 Submodule 3 reload interrupt Reload event has occurred
REF
REF_0 REIE_0 Submodule 0 reload error interrupt
Reload error has occurred
REF_1 REIE_1 Submodule 1 reload error interrupt
REF_2 REIE_2 Submodule 2 reload error interrupt
REF_3 REIE_3 Submodule 3 reload error interrupt
FFLAG FFLAG FIE Fault input interrupt Fault condition has been detected

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