ST SPC560P34 - Figure 403. Interrupt and DMA Enable Register (INTDMA); Table 377. INTDMA Field Descriptions

RM0046 eTimer
Doc ID 16912 Rev 5 721/936
Interrupt and DMA enable register (INTDMA)
Figure 403. Interrupt and DMA enable register (INTDMA)
Address:
Base + 0x0016 (eTimer0)
Base + 0x0036 (eTimer1)
Base + 0x0056 (eTimer2)
Base + 0x0076 (eTimer3)
Base + 0x0096 (eTimer4)
Base + 0x00B6 (eTimer5)
Access: User read/write
0123456789101112131415
R
ICF2DE ICF1DE
CMPLD2DE CMPLD1DE
00
WDFIE
RCFIE
ICF2IE ICF1IE
IEHFIE
IELFIE
TOFIE
TCF2IE TCF1IE
TCFIE
W
Reset0000000000000000
Table 377. INTDMA field descriptions
Field Description
ICF2DE
Input Capture 2 Flag DMA Enable
Setting this bit enables DMA read requests for CAPT2 when the ICF2 bit is set. Do not set both this
bit and the ICF2IE bit.
ICF1DE
Input Capture 1 Flag DMA Enable
Setting this bit enables DMA read requests for CAPT1 when the ICF1 bit is set. Do not set both this
bit and the ICF1IE bit.
CMPLD2DE
Comparator Load Register 2 Flag DMA Enable
Setting this bit enables DMA write requests to the CMPLD2 register whenever data is transferred
out of the CMPLD2 reg into either the CNTR, COMP1, or COMP2 registers.
CMPLD1DE
Comparator Load Register 1 Flag DMA Enable
Setting this bit enables DMA write requests to the CMPLD1 register whenever data is transferred
out of the CMPLD1 reg into either the CNTR, COMP1, or COMP2 registers.
WDFIE
Watchdog Flag Interrupt Enable
Setting this bit enables interrupts when the WDF bit is set. This bit is used in channel 0 only.
RCFIE
Redundant Channel Flag Interrupt Enable
Setting this bit enables interrupts when the RCF bit is set. This bit is used in even channels (0, 2, 4)
only.
ICF2IE
Input Capture 2 Flag Interrupt Enable
Setting this bit enables interrupts when the ICF2 bit is set. Do not set both this bit and the ICF2DE
bit.
ICF1IE
Input Capture 1 Flag Interrupt Enable
Setting this bit enables interrupts when the ICF1 bit is set. Do not set both this bit and the ICF1DE
bit.
IEHFIE
Input Edge High Flag Interrupt Enable
Setting this bit enables interrupts when the IEHF bit is set.
IELFIE
Input Edge Low Flag Interrupt Enable
Setting this bit enables interrupts when the IELF bit is set.
TOFIE
Timer Overflow Flag Interrupt Enable
Setting this bit enables interrupts when the TOF bit is set.