e200z0 and e200z0h Core RM0046
270/936 Doc ID 16912 Rev 5
12 e200z0 and e200z0h Core
12.1 Overview
The SPC560P40/34 microcontroller implements the e200z0h core.
The e200 processor family is a set of CPU cores built on the Power Architecture technology.
e200 processors are designed for deeply embedded control applications that require low
cost solutions rather than maximum performance.
The e200z0 and e200z0h processors integrate an integer execution unit, branch control
unit, instruction fetch and load/store units, and a multi-ported register file capable of
sustaining three read and two write operations per clock. Most integer instructions execute
in a single clock cycle. Branch target prefetching is performed by the branch unit to allow
single-cycle branches in some cases.
The e200z0 core is a single-issue, 32-bit Power Architecture technology VLE-only design
with 32-bit general purpose registers (GPRs). Implementing only the VLE (variable-length
encoding) APU provides improved code density. All arithmetic instructions that execute in
the core operate on data in the GPRs.
12.2 Features
The following is a list of some of the key features of the e200z0 and e200z0h cores:
● 32-bit Power Architecture technology VLE-only programmer’s model
● Single issue, 32-bit CPU
● Implements the VLE APU for reduced code footprint
● In-order execution and retirement
● Precise exception handling
● Branch processing unit
– Dedicated branch address calculation adder
– Branch acceleration using Branch Target Buffer (e200z0h only)
● Supports independent instruction and data accesses to different memory subsystems,
such as SRAM and Flash memory via independent Instruction and Data bus interface
units (BIUs) (e200z0h only)
● Supports instruction and data access via a unified 32-bit Instruction/Data BIU (e200z0
only)
● Load/store unit
– 1 cycle load latency
– Fully pipelined
– Big-endian support only
– Misaligned access support
– Zero load-to-use pipeline bubbles for aligned transfers
● Power management
– Low power design
– Dynamic power management of execution units
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