ST SPC560P34 - Table 299. WTISR Field Descriptions; Figure 289. Channel Interrupt Mask Register 0 (CIMR0); Figure 290. Watchdog Threshold Interrupt Status Register (WTISR)

RM0046 Analog-to-Digital Converter (ADC)
Doc ID 16912 Rev 5 593/936
Watchdog Threshold Interrupt Status Register (WTISR)
Figure 289. Channel Interrupt Mask Register 0 (CIMR0)
Address: Base + 0x0024 Access: User read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CIM
15
CIM
14
CIM
13
CIM
12
CIM
11
CIM
10
CIM
9
CIM
8
CIM
7
CIM
6
CIM
5
CIM
4
CIM
3
CIM
2
CIM
1
CIM
0
W
Reset0000000000000000
Figure 290. Watchdog Threshold Interrupt Status Register (WTISR)
Address: Base + 0x0030 Access: User read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R00000000
WDG3H WDG2H WDG1H WDG0H
WDG3L WDG2L WDG1L WDG0L
W w1c w1c w1c w1c w1c w1c w1c w1c
Reset0000000000000000
Table 299. WTISR field descriptions
Field Description
WDGxH
This corresponds to the status flag generated on the converted value being higher than the
programmed higher threshold (for [x = 0..3]).
WDGxL
This corresponds to the status flag generated on the converted value being lower than the programmed
lower threshold (for [x = 0..3]).