ST SPC560P34 - Table 260. Message Buffer

RM0046 LIN Controller (LINFlex)
Doc ID 16912 Rev 5 519/936
UART transmitter
In order to start transmission in UART mode, you must program the UART bit and the
transmitter enable (TXEN) bit in the UARTCR to 1. Transmission starts when DATA0 (least
significant data byte) is programmed. The number of bytes transmitted is equal to the value
configured by UARTCR[TDFL] (see Table 241).
The Transmit buffer is 4 bytes, hence a 4-byte maximum transmission can be triggered.
Once the programmed number of bytes has been transmitted, the UARTSR[DTF] bit is set.
If UARTCR[TXEN] is reset during a transmission then the current transmission is completed
and no further transmission can be invoked.
UART receiver
The UART receiver is active as soon as the user exits Initialization mode and programs
UARTCR[RXEN] = 1. There is a dedicated 4-byte data buffer for received data bytes. Once
the programmed number (RDFL bits) of bytes has been received, the UARTSR[DRF] bit is
set. If the RXEN bit is reset during a reception then the current reception is completed and
no further reception can be invoked until RXEN is set.
If a parity error occurs during reception of any byte, then the corresponding PEx bit in the
UARTSR is set. No interrupt is generated in this case. If a framing error occurs in any byte
(UARTSR[FE] = 1) then an interrupt is generated if the LINIER[FEIE] bit is set.
If the last received frame has not been read from the buffer (that is, RMB bit is not reset by
the user) then upon reception of the next byte an overrun error occurs (UARTSR[BOF] = 1)
and one message will be lost. Which message is lost depends on the configuration of
LINCR1[RBLM].
● If the buffer lock function is disabled (LINCR1[RBLM] = 0) the last message stored in
the buffer is overwritten by the new incoming message. In this case the latest message
is always available to the application.
● If the buffer lock function is enabled (LINCR1[RBLM] = 1) the most recent message is
discarded and the previous message is available in the buffer.
An interrupt is generated if the LINIER[BOIE] bit is set.
Table 260. Message buffer
Buffer data
register
LIN mode UART mode
BDRL[0:31]
Transmit/Receive
buffer
DATA0[0:7]
Transmit buffer
Tx0
DATA1[0:7] Tx1
DATA2[0:7] Tx2
DATA3[0:7] Tx3
BDRM[0:31]
DATA4[0:7]
Receive buffer
Rx0
DATA5[0:7] Rx1
DATA6[0:7] Rx2
DATA7[0:7] Rx3