ST SPC560P34 - Table 465. DBERC0 Resource Control

Nexus Development Interface (NDI) RM0046
886/936 Doc ID 16912 Rev 5
Table 465 shows which resources are controlled by DBERC0 settings.
25 CIRPT
Critical Interrupt Taken Debug Event
0 – Event owned by hardware debug. No mtspr access by software to DBCR0
CIRPT
or
DBSR
CIRPT
fields.
1 – Event owned by software debug. DBCR0
CIRPT
and DBSR
CIRPT
are software
readable/writeable.
26 CRET
Critical Return Debug Event
0 – Event owned by hardware debug. No mtspr access by software to DBCR0
CRET
or
DBSR
CRET
fields.
1 – Event owned by software debug. DBCR0
CRET
and DBSR
CRET
are software
readable/writeable.
27 BKPT
Breakpoint Instruction Debug Control
0 – Breakpoint owned by hardware debug. Execution of a bkpt instruction (all 0’s opcode)
results in entry into debug mode.
1 – Breakpoint owned by software debug. Execution of a bkpt instruction (all 0’s opcode)
results in illegal instruction exception.
28:30 — Reserved
31 FT
Freeze Timer Debug Control
0 – DBCR0
FT
owned by hardware debug. No access by software.
1 – DBCR0
FT
owned by software debug. DBCR0
FT
is software readable/writeable.
Table 464. DBERC0 Bit Definitions (continued)
Bit(s) Name Description
Table 465. DBERC0 Resource Control
DBCR0
EDM
DBERC0
IDM
DBERC0
RST
DBERC0
UDE
DBERC0
ICMP
DBERC0
BRT
DBERC0
IRPT
DBERC0
TRAP
DBERC0
IAC1
DBERC0
IAC2
DBERC0
IAC3
DBERC0
IAC4
DBERC0
DAC1
DBERC0
DAC2
DBERC0
RET
DBERC0
DEVT1
DBERC0
DEVT2
DBERC0
CIRPT
DBERC0
CRET
DBERC0
BKPT
DBERC0
DQM
DBERC0
FT
Software Accessible via
mtspr,
affected by p_reset_b
0 ———————————————————————All debug registers
1 1 ——————————————————————DBSR
MRR
(1)
1 1 ——————————————————————DBCR0
IDM
, DBSR
IDE, VLES
1 1 1 —————————————————————DBCR0
RST
1 1 —1 ————————————————————DBCR0
UDE
1 1 ——1 ———————————————————DBCR0
ICMP
, DBSR
ICMP
1 1 ———1 ——————————————————DBCR0
BRT
, DBSR
BRT
1 1 ————1 —————————————————DBCR0
IRPT
, DBSR
IRPT
1 1 —————1 ————————————————DBCR0
TRAP
, DBSR
TRAP
1 1 ——————1 ———————————————
IAC1,
DBCR0
IAC1
,
DBCR1
IAC1US, IAC1ER
,
DBSR
IAC1
1 1 ———————1 ——————————————
IAC2,
DBCR0
IAC2
,
DBCR1
IAC2US, IAC2ER
,
DBSR
IAC2