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ST SPC560P34 - Etimer

ST SPC560P34
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Introduction RM0046
64/936 Doc ID 16912 Rev 5
● Channels not used for PWM generation can be used for input capture functions
● Enhanced dual-edge capture functionality
● eDMA support with automatic reload
● 2 fault inputs
● Capture capability for PWMA, PWMB, and PWMX channels not supported
1.6.25 eTimer
The SPC560P40/34 includes one eTimer module which provides six 16-bit general purpose
up/down timer/counter units with the following features:
● Clock frequency same as that used for the e200z0h core
● Individual channel capability
– Input capture trigger
– Output compare
– Double buffer (to capture rising edge and falling edge)
– Separate prescaler for each counter
– Selectable clock source
– 0–100% pulse measurement
– Rotation direction flag (quad decoder mode)
● Maximum count rate
– External event counting: max. count rate = peripheral clock/2
– Internal clock counting: max. count rate = peripheral clock
● Counters are:
– Cascadable
– Preloadable
● Programmable count modulo
● Quadrature decode capabilities
● Counters can share available input pins
● Count once or repeatedly
● Pins available as GPIO when timer functionality not in use

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