Deserial Serial Peripheral Interface (DSPI) RM0046
440/936 Doc ID 16912 Rev 5
The module-specific modes are entered by host software writing to a register. The MCU-
specific mode is controlled by signals external to the DSPI. The MCU-specific mode is a
mode that the entire device may enter, in parallel to the DSPI being in one of its module-
specific modes.
20.5.1 Master mode
Master mode allows the DSPI to initiate and control serial communication. In this mode, the
SCK, CS
n and SOUT signals are controlled by the DSPI and configured as outputs.
For more information, refer to Section , “Master mode.
20.5.2 Slave mode
Slave mode allows the DSPI to communicate with SPI bus masters. In this mode the DSPI
responds to externally controlled serial transfers. The DSPI cannot initiate serial transfers in
slave mode. In slave mode, the SCK signal and the CS0_x signal are configured as inputs
and provided by a bus master. CS0_
x must be configured as input and pulled high. If the
internal pullup is being used then the appropriate bits in the relevant SIU_PCR must be set
(SIU_PCR [WPE = 1], [WPS = 1]).
For more information, refer to Section , “Slave mode.
20.5.3 Module disable mode
The module disable mode is used for MCU power management. The clock to the non-
memory mapped logic in the DSPI is stopped while in module disable mode. The DSPI
enters the module disable mode when the MDIS bit in DSPIx_MCR is set.
For more information, refer to Section , “Module disable mode.
20.5.4 Debug mode
Debug mode is used for system development and debugging. If the device enters debug
mode while the FRZ bit in the DSPIx_MCR is set, the DSPI halts operation on the next
frame boundary. If the device enters debug mode while the FRZ bit is cleared, the DSPI
behavior is unaffected.
For more information, refer to Section , “Debug mode.
20.6 External signal description
20.6.1 Signal overview
Table 204 lists off-chip DSPI signals.
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