RM0046 Reset Generation Module (MC_RGM)
Doc ID 16912 Rev 5 193/936
This register contains the status of the last asserted functional reset sources. It can be
accessed in read/write on either supervisor mode or test mode. Register bits are cleared on
write ‘1’.
Table 58. Functional Event Status Register (RGM_FES) Field Descriptions
Field Description
F_EXR
Flag for External Reset
0 No external reset event has occurred since either the last clear or the last destructive reset
assertion
1 An external reset event has occurred
F_PLL1
Flag for PLL1 fail
0 No PLL1 fail event has occurred since either the last clear or the last destructive reset assertion
1 A PLL1 fail event has occurred
F_FLASH
Flag for code or data flash fatal error
0 No code or data flash fatal error event has occurred since either the last clear or the last
destructive reset assertion
1 A code or data flash fatal error event has occurred
F_LVD45
Flag for 4.5V low-voltage detected
0 No 4.5V low-voltage detected event has occurred since either the last clear or the last destructive
reset assertion
1 A 4.5V low-voltage detected event has occurred
F_CMU0_FHL
Flag for CMU0 clock frequency higher/lower than reference
0 No CMU0 clock frequency higher/lower than reference event has occurred since either the last
clear or the last destructive reset assertion
1 A CMU0 clock frequency higher/lower than reference event has occurred
F_CMU0_OLR
Flag for oscillator frequency lower than reference
0 No oscillator frequency lower than reference event has occurred since either the last clear or the
last destructive reset assertion
1 A oscillator frequency lower than reference event has occurred
F_PLL0
Flag for PLL0 fail
0 No PLL0 fail event has occurred since either the last clear or the last destructive reset assertion
1 A PLL0 fail event has occurred
F_CHKSTOP
Flag for checkstop reset
0 No checkstop reset event has occurred since either the last clear or the last destructive reset
assertion
1 A checkstop reset event has occurred
F_SOFT
Flag for software reset
0 No software reset event has occurred since either the last clear or the last destructive reset
assertion
1 A software reset event has occurred
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