ST SPC560P34 - Table 114. REV Field Descriptions; Table 115. PLAMC Field Descriptions; Figure 125. Platform XBAR Master Configuration (PLAMC) Register; Figure 126. Platform XBAR Slave Configuration (PLASC) Register

RM0046 Error Correction Status Module (ECSM)
Doc ID 16912 Rev 5 289/936
Platform XBAR Master Configuration (PLAMC)
The PLAMC is a 16-bit read-only register identifying the presence/absence of bus master
connections to the device’s AMBA-AHB Crossbar Switch (XBAR). The state of this register
is defined by a module input signal; it can only be read from the IPS programming model.
Any attempted write is ignored.
Platform XBAR Slave Configuration (PLASC)
The PLASC is a 16-bit read-only register identifying the presence/absence of bus slave
connections to the device’s AMBA-AHB Crossbar Switch (XBAR), plus a 1-bit flag defining
the internal platform datapath width (DP64). The state of this register is defined by a module
input signal; it can only be read from the IPS programming model. Any attempted write is
ignored.
Table 114. REV field descriptions
Name Description
0-15
REV[15:0]
Revision
The REV[15:0] field is specified by an input signal to define a software-visible revision number.
Figure 125. Platform XBAR Master Configuration (PLAMC) register
Address Base + 0x0004 Access: User read/-only
0123456789101112131415
R000000 0 0 AMC[7:0]
W
Reset00000000 AMC[7:0]
Table 115. PLAMC field descriptions
Field Description
AMC[7:0]
XBAR Master Configuration
0 Bus master connection to XBAR input port n is not present.
1 Bus master connection to XBAR input port n is present.
Figure 126. Platform XBAR Slave Configuration (PLASC) register
Address Base + 0x0006 Access: User read-only
0123456789101112131415
R DP64 00000 0 0 ASC[7:0]
W
Reset00000000 ASC[7:0]