Flash Memory RM0046
366/936 Doc ID 16912 Rev 5
User Multiple Input Signature Register 4 (UMISR4)
The Multiple Input Signature Register 4 (UMISR4) provides a means to evaluate the array
integrity. The UMISR4 represents the ECC bits of the whole 144-bit word (2 double words
including ECC). Bits 8:15 are ECC bits for the odd double word and bits 24:31 are the ECC
bits for the even double word. Bits 4:5 and 20:21 of UMISR4 are the double and single ECC
error detection for odd and even double words, respectively.
UMISR4 is not accessible whenever MCR[DONE] or UT0[AID] are low. Reads return
indeterminate data. Writes have no effect.
Note: This register is not implemented on the data Flash block.
Figure 169. User Multiple Input Signature Register 3 (UMISR3)
Address:
Base + 0x0054 Access: User read/write
0123456789101112131415
R
MS
127
MS
126
MS
125
MS
124
MS
123
MS
122
MS
121
MS
120
MS
119
MS
118
MS
117
MS
116
MS
115
MS
114
MS
113
MS
112
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MS
111
MS
110
MS
109
MS
108
MS
107
MS
106
MS
105
MS
104
MS
103
MS
102
MS
101
MS
100
MS
099
MS
098
MS
097
MS
096
W
Reset0000000000000000
Table 165. UMISR3 field descriptions
Field Description
MS[127:096]
0:31
Multiple Input Signature 127–096
These bits represent the MISR value obtained accumulating bits 127:96 of all the pages read from
the Flash memory.
The MS can be seeded to any value by writing the UMISR3 register.
Figure 170. User Multiple Input Signature Register 4 (UMISR4)
Address:
Base + 0x0058 Access: User read/write
0123456789101112131415
R
MS
159
MS
158
MS
157
MS
156
MS
155
MS
154
MS
153
MS
152
MS
151
MS
150
MS
149
MS
148
MS
147
MS
146
MS
145
MS
144
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MS
143
MS
142
MS
141
MS
140
MS
139
MS
138
MS
137
MS
136
MS
135
MS
134
MS
133
MS
132
MS
131
MS
130
MS
129
MS
128
W
Reset0000000000000000
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