ST SPC560P34 - Figure 335. Counter Register (CNT); Figure 336. Initial Count Register (INIT); Submodule Registers

RM0046 FlexPWM
Doc ID 16912 Rev 5 651/936
There are a set of registers for each PWM submodule, for the configuration logic, and for
each Fault channel.
25.6.3 Submodule registers
These registers are repeated for each PWM submodule.
Counter Register (CNT)
This read-only register displays the state of the signed 16-bit submodule counter. This
register is not byte accessible.
Initial Count Register (INIT)
The 16-bit signed value in this register defines the initial count value for the PWM in PWM
clock periods. This is the value loaded into the submodule counter when local sync, master
sync, or master reload is asserted (based on the value of INIT_SEL) or when FORCE is
asserted and force init is enabled. For PWM operation, the buffered contents of this register
are loaded into the counter at the start of every PWM cycle. This register is not byte
accessible.
Note: The INIT register is buffered. The value written does not take effect until the LDOK bit is set
and the next PWM load cycle begins. This register cannot be written when LDOK is set.
Reading INIT reads the value in a buffer and not necessarily the value the PWM generator is
currently using.
Figure 335. Counter Register (CNT)
Address:
Base + 0x0000 (Submodule 0)
Base + 0x0050 (Submodule 1)
Base + 0x00A0 (Submodule 2)
Base + 0x00F0 (Submodule 3) Access: User read-only
0123456789101112131415
R CNT
W
Reset0000000000000000
Figure 336. Initial Count Register (INIT)
Address:
Base + 0x0002 (Submodule 0)
Base + 0x0052 (Submodule 1)
Base + 0x00A2 (Submodule 2)
Base + 0x00F2 (Submodule 3) Access: User read/write
0123456789101112131415
R
INIT
W
Reset0000000000000000