ST SPC560P34 - Table 263. Flexcan Signals; External Signal Description

FlexCAN RM0046
534/936 Doc ID 16912 Rev 5
22.2 External signal description
22.2.1 Overview
The FlexCAN module has two I/O signals connected to the external MCU pins. These
signals are summarized in Table 263 and described in more detail in the next subsections.
22.2.2 Signal Descriptions
RXD
This pin is the receive pin from the CAN bus transceiver. Dominant state is represented by
logic level 0. Recessive state is represented by logic level 1.
TXD
This pin is the transmit pin to the CAN bus transceiver. Dominant state is represented by
logic level 0. Recessive state is represented by logic level 1.
22.3 Memory map and registers description
This section describes the registers and data structures in the FlexCAN module. The base
address of the module depends on the particular memory map of the device. The addresses
presented here are relative to the base address.
The address space occupied by FlexCAN has 96 bytes for registers starting at the module
base address, followed by MB storage space in embedded RAM starting at address 0x0060,
and an extra ID Mask storage space in a separate embedded RAM starting at address
0x0880.
22.3.1 FlexCAN memory mapping
The complete memory map for a FlexCAN module with 32 MBs capability is shown in
Table 264. The access type can be Supervisor (S), Test (T) or Unrestricted (U), also called
User access. Most of the registers can be configured to have either Supervisor or
Unrestricted access by programming the SUPV bit in the MCR.
The Rx Global Mask (RXGMASK), Rx Buffer 14 Mask (RX14MASK) and the Rx Buffer 15
Mask (RX15MASK) registers are provided for backwards compatibility, and are not used
when the BCC bit in the MCR is asserted.
The address ranges 0x0060–0x027F and 0x0880–0x08FF are occupied by two separate
embedded memories of RAM, of 544 bytes and 128 bytes, respectively. When the FlexCAN
is configured with 32 MBs, the memory sizes are 544 and 128 bytes, so the address ranges
0x0280–0x047F and 0x0900–0x097F are considered reserved space. Furthermore, if the
Table 263. FlexCAN signals
Signal name Direction Description
RXD Input CAN receive pin
TXD Output CAN transmit pin