RM0046 Cross Triggering Unit (CTU)
Doc ID 16912 Rev 5 635/936
24.8.14 FIFO status register (FST)
TH1 FIFO 1 Threshold
TH0 FIFO 0 Threshold
Table 330. FTH field descriptions (continued)
Field Description
Figure 323. FIFO status register (FST)
Address:
Base + 0x007C Access: User read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
ROR3 OF3
EMP3
FULL3
OR2 OF2
EMP2
FULL2
OR1 OF1
EMP1
FULL1
OR0 OF0
EMP0
FULL0
Wr1c r1c r1c r1c
Reset0000000000000000
Table 331. FST field descriptions
Field Description
OR3
FIFO 3 Overrun interrupt flag
A read of this bit clears it.
0 Interrupt has not occurred.
1 Interrupt has occurred.
OF3
FIFO 3 threshold Overflow interrupt flag
0 Interrupt has not occurred.
1 Interrupt has occurred.
EMP3
FIFO 3 Empty interrupt flag
0 Interrupt has not occurred.
1 Interrupt has occurred.
FULL3
FIFO 3 Full interrupt flag
0 Interrupt has not occurred.
1 Interrupt has occurred.
OR2
FIFO 2 Overrun interrupt flag
A read of this bit clears it.
0 Interrupt has not occurred.
1 Interrupt has occurred.
OF2
FIFO 2 threshold Overflow interrupt flag
0 Interrupt has not occurred.
1 Interrupt has occurred.
EMP2
FIFO 2 Empty interrupt flag
0 Interrupt has not occurred.
1 Interrupt has occurred.