Analog-to-Digital Converter (ADC) RM0046
592/936 Doc ID 16912 Rev 5
Interrupt Mask Register (IMR)
The Interrupt Mask Register (IMR) contains the interrupt enable bits for the ADC.
Table 297. ISR field descriptions
Field Description
EOCTU
End of CTU Conversion interrupt flag
When this bit is set, an EOCTU interrupt has occurred.
JEOC
End of Injected Channel Conversion interrupt flag
When this bit is set, a JEOC interrupt has occurred.
JECH
End of Injected Chain Conversion interrupt flag
When this bit is set, a JECH interrupt has occurred.
EOC
End of Channel Conversion interrupt flag
When this bit is set, an EOC interrupt has occurred.
ECH
End of Chain Conversion interrupt flag
When this bit is set, an ECH interrupt has occurred.
Figure 288. Interrupt Mask Register (IMR)
Address:
Base + 0x0020 Access: User read/write
0123456789101112131415
R00000000 00000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R00000000 000
MSKE
OCTU
MSK
JEOC
MSK
JECH
MSK
EOC
MSK
ECH
W
Reset0000000000000000
Table 298. IMR field descriptions
Field Description
MSKEOCTU
Mask for end of CTU conversion (EOCTU) interrupt
When set, the EOCTU interrupt is enabled.
MSKJEOC
Mask for end of injected channel conversion (JEOC) interrupt
When set, the JEOC interrupt is enabled.
MSKJECH
Mask for end of injected chain conversion (JECH) interrupt
When set, the JECH interrupt is enabled.
MSKEOC
Mask for end of channel conversion (EOC) interrupt
When set, the EOC interrupt is enabled.
MSKECH
Mask for end of chain conversion (ECH) interrupt
When set, the ECH interrupt is enabled.