ST SPC560P34 - Figure 429. SWT Interrupt Register (SWT_IR); Figure 430. SWT Time-Out Register (SWT_TO); Table 393. SWT_IR Field Descriptions

RM0046 Functional Safety
Doc ID 16912 Rev 5 749/936
SWT Interrupt Register (SWT_IR)
The SWT_IR contains the time-out interrupt flag.
SWT Time-Out register (SWT_TO)
The SWT Time-Out (SWT_TO) register contains the 32-bit time-out period. The reset value
for this register is device specific. This register is read only if either the SWT_CR[HLK] or
SWT_CR[SLK] bits are set.
The default counter value (SWT_TO_RST) is 0x0003_A980, which corresponds to
approximately 15 ms with the 16 MHz IRC clock.
Figure 429. SWT Interrupt Register (SWT_IR)
Address: Base + 0x0004 Access: User read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R00000000 0000000
TIF
W
Reset0000000000000000
Table 393. SWT_IR field descriptions
Field Description
TIF
Time-out Interrupt Flag
The flag and interrupt are cleared by writing a 1 to this bit. Writing a 0 has no effect.
0 No interrupt request.
1 Interrupt request due to an initial time-out.
Figure 430. SWT Time-Out register (SWT_TO)
Address: Base + 0x0008 Access: User read/write
0123456789101112131415
R
WTO
W
Reset0000000000000011
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
WTO
W
Reset1010100110000000