ST SPC560P34 - Figure 208. DSPI Transfer Count Register (Dspix_Tcr); Table 207. Dspix_Tcr Field Descriptions

RM0046 Deserial Serial Peripheral Interface (DSPI)
Doc ID 16912 Rev 5 447/936
DSPI Clock and Transfer Attributes Registers 0–7 (DSPIx_CTARn)
The DSPI modules each contain eight clock and transfer attribute registers (DSPIx_CTARn)
that define different transfer attribute configurations. Each DSPIx_CTAR controls:
● Frame size
● Baud rate and transfer delay values
● Clock phase
● Clock polarity
● MSB or LSB first
DSPIx_CTARs support compatibility with the QSPI module used in certain members of the
SPC56x family of MCUs. At the initiation of an SPI transfer, control logic selects the
DSPIx_CTAR that contains the transfer’s attributes. Do not write to the DSPIx_CTARs while
the DSPI is running.
In master mode, the DSPIx_CTARn registers define combinations of transfer attributes such
as frame size, clock phase and polarity, data bit ordering, baud rate, and various delays. In
slave mode, a subset of the bit fields in the DSPIx_CTAR0 and DSPIx_CTAR1 registers sets
the slave transfer attributes. Refer to the individual bit descriptions for details on which bits
are used in slave modes.
When the DSPI is configured as an SPI master, the CTAS field in the command portion of
the TX FIFO entry selects which of the DSPIx_CTAR registers is used on a per-frame basis.
When the DSPI is configured as an SPI bus slave, the DSPIx_CTAR0 register is used.
Figure 208. DSPI Transfer Count Register (DSPIx_TCR)
Address: Base + 0x0008 Access: User read/write
0123456789101112131415
R
SPI_TCNT[0:15]
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R00000000 00000000
W
Reset0000000000000000
Table 207. DSPIx_TCR field descriptions
Field Description
0–15
SPI_TCNT
[0:15]
SPI transfer counter
Counts the number of SPI transfers the DSPI makes. The SPI_TCNT field is incremented every time
the last bit of an SPI frame is transmitted. A value written to SPI_TCNT presets the counter to that
value. SPI_TCNT is reset to zero at the beginning of the frame when the CTCNT field is set in the
executing SPI command. The transfer counter ‘wraps around,’ incrementing the counter past 65535
resets the counter to zero.
16–31 Reserved