EasyManua.ls Logo

ST SPC560P34 - Table 304. Thrhlrx Field Descriptions; Figure 295. Threshold Register (THRHLR[0:3])

ST SPC560P34
936 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Analog-to-Digital Converter (ADC) RM0046
598/936 Doc ID 16912 Rev 5
Threshold Register (THRHLR[0:3])
The four THRHLRn registers store the user-programmable thresholds’ 10-bit values.
Figure 295. Threshold Register (THRHLR[0:3])
Address:
Base + 0x0060 (THRHLR0)
Base + 0x0064 (THRHLR1)
Base + 0x0068 (THRHLR2)
Base + 0x006C (THRHLR3) Access: User read/write
0123456789101112131415
R000000
THRH
W
Reset0000001111111111
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000
THRL
W
Reset0000000000000000
Table 304. THRHLRx field descriptions
Field Description
THRH High threshold value for channel n.
THRL Low threshold value for channel n.

Table of Contents

Related product manuals