Fault Collection Unit (FCU) RM0046
766/936 Doc ID 16912 Rev 5
Timeout Register (FCU_TR)
Once the FCU goes into Alarm state, a fault can be recovered before the timeout elapses.
This timeout should be long enough for hardware or software to recover from the fault. If the
fault is not recovered before the timeout elapses, the FCU goes into Fault state.
Figure 442. Key Register (FCU_KR)
Address:
Base + 0x0014 Access: User read-only, Supervisor read-only
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R00000000 00000000
W
Reset0000000000000000
Figure 443. Timeout Register (FCU_TR)
Address:
Base + 0x0018 Access: User read/write, Supervisor read/write
0123456789101112131415
R
TR[0:15]
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TR[31:16]
W
Reset1111111111111111
Table 407. FCU_TR field descriptions
Field Description
0-31
TR
FCU Timeout
00000: Timeout is one clock (16 MHz) cycle
00001: Timeout is one clock (16 MHz) cycle
00002: Timeout is two clock (16 MHz) cycles
00003: Timeout is three clock (16 MHz) cycles
...
Default at reset is 0x0000_FFFF. Timeout is 65,535 clock cycles (about 4.1 ms at 16 MHz, high speed
RC clock)
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