Flash Memory RM0046
350/936 Doc ID 16912 Rev 5
Table 152. SLL and NVSLL field descriptions
Field Description
SLE
(1)
0
Secondary Low/Mid Address Space Block Enable
This bit enables the Lock registers (STSLK and SLK[15:0]) to be set or cleared by registers writes.
This bit is a status bit only. The method to set this bit is to write a password, and if the password
matches, the SLE bit is set to reflect the status of enabled, and is enabled until a reset operation
occurs. For SLE the password 0xC3C3_3333 must be written to the SLL register.
0 Secondary Low/Mid Address Locks are disabled: STSLK and SLK[15:0] cannot be written.
1 Secondary Low/Mid Address Locks are enabled: STSLK and SLK[15:0] can be written.
1:10
Reserved (Read Only)
A write to these bits has no effect. A read of these bits always outputs 0.
STSLK
11
Secondary Test/Shadow address space block LocK
This bit is used as an alternate means to lock the block of Test and Shadow Address Space from
program and Erase (Erase is any case forbidden for Test block).
A value of 1 in the STSLK bitfield signifies that the Test/Shadow block is locked for program and
Erase.
A value of 0 in the STSLK register signifies that the Test/Shadow block is available to receive
program and Erase pulses.
The STSLK register is not writable once an interlock write is completed until MCR[DONE] is set at
the completion of the requested operation. Likewise, the STSLK register is not writable if a high
voltage operation is suspended.
Upon reset, information from the TestFlash block is loaded into the STSLK register. The STSLK bit
may be written as a register. Reset will cause the bit to go back to its TestFlash block value. The
default value of the STSLK bit (assuming erased fuses) would be locked.
STSLK is not writable unless SLE is high.
0 Test/Shadow Address Space Block is unlocked and can be modified (if also LML[TSLK] = 0).
1 Test/Shadow Address Space Block is locked and cannot be modified.
12:13
Reserved (Read Only)
A write to these bits has no effect. A read of these bits always outputs 0.
14:15 Reserved
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