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ST SPC560P34 - Serial Communication Interface Module (Linflex); Deserial Serial Peripheral Interface (DSPI)

ST SPC560P34
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Introduction RM0046
62/936 Doc ID 16912 Rev 5
1.6.22 Serial communication interface module (LINFlex)
The LINFlex (local interconnect network flexible) on the SPC560P40/34 features the
following:
● Supports LIN Master mode (both instances), LIN Slave mode (only one instance) and
UART mode
● LIN state machine compliant to LIN1.3, 2.0 and 2.1 specifications
● Handles LIN frame transmission and reception without CPU intervention
● LIN features
– Autonomous LIN frame handling
– Message buffer to store Identifier and up to 8 data bytes
– Supports message length of up to 64 bytes
– Detection and flagging of LIN errors (sync field, delimiter, ID parity, bit framing,
checksum, and time-out)
– Classic or extended checksum calculation
– Configurable Break duration of up to 36-bit times
– Programmable baud rate prescalers (13-bit mantissa, 4-bit fractional)
– Diagnostic features: Loop back; Self Test; LIN bus stuck dominant detection
– Interrupt-driven operation with 16 interrupt sources
● LIN slave mode features:
– Autonomous LIN header handling
– Autonomous LIN response handling
– Optional discarding of irrelevant LIN responses using ID filter
● UART mode:
– Full-duplex operation
– Standard non return-to-zero (NRZ) mark/space format
– Data buffers with 4-byte receive, 4-byte transmit
– Configurable word length (8-bit or 9-bit words)
– Error detection and flagging
– Parity, Noise and Framing errors
– Interrupt-driven operation with four interrupt sources
– Separate transmitter and receiver CPU interrupt sources
– 16-bit programmable baud-rate modulus counter and 16-bit fractional
– 2 receiver wake-up methods
1.6.23 Deserial serial peripheral interface (DSPI)
The deserial serial peripheral interface (DSPI) module provides a synchronous serial
interface for communication between the SPC560P40/34 MCU and external devices.
The DSPI modules provide these features:
● Full duplex, synchronous transfers
● Master or slave operation
● Programmable master bit rates
● Programmable clock polarity and phase

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