RM0046 eTimer
Doc ID 16912 Rev 5 729/936
26.7 Functional description
26.7.1 General
Each channel has two basic modes of operation: it can count internal or external events, or
it can count an internal clock source while an external input signal is asserted, thus timing
the width of the external input signal.
â—Ź The counter can count the rising, falling, or both edges of the selected input pin.
â—Ź The counter can decode and count quadrature encoded input signals.
● The counter can count up and down using dual inputs in a “count with direction” format.
● The counter’s terminal count value (modulo) is programmable.
– The value that is loaded into the counter after reaching its terminal count is
programmable.
â—Ź The counter can count repeatedly, or it can stop after completing one count cycle.
â—Ź The counter can be programmed to count to a programmed value and then
immediately reinitialize, or it can count through the compare value until the count “rolls
over” to zero.
The external inputs to each counter/timer are shareable among each of the six channels
within the module. The external inputs can be used as:
â—Ź Count commands
â—Ź Timer commands
● They can trigger the current counter value to be “captured”
â—Ź They can be used to generate interrupt requests
The polarity of the external inputs is selectable.
The primary output of each channel is the output signal OFLAG. The OFLAG output signal
can be:
â—Ź Set, cleared, or toggled when the counter reaches the programmed value.
â—Ź The OFLAG output signal may be output to an external pin instead of having that pin
serve as a timer input.
â—Ź The OFLAG output signal enables each counter to generate square waves, PWM, or
pulse stream outputs.
â—Ź The polarity of the OFLAG output signal is programmable.
Any channel can be assigned as a Master. A master’s compare signal can be broadcast to
the other channels within the module. The other channels can be configured to reinitialize
their counters and/or force their OFLAG output signals to predetermined values when a
Master channel’s compare event occurs.
26.7.2 Counting modes
The selected external signals are sampled at the eTimer’s base clock rate and then run
through a transition detector. The maximum count rate is one-half of the eTimer’s base clock
rate when using an external signal. Internal clock sources can be used to clock the counters
at the eTimer’s base clock rate.
If a counter is programmed to count to a specific value and then stop, the CNTMODE field in
the CTRL1 register is cleared when the count terminates.
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