RM0046 Error Correction Status Module (ECSM)
Doc ID 16912 Rev 5 307/936
Figure 143. Spp_Ips_Reg_Protection block diagram
Attempted accesses to reserved addresses result in an error termination, while attempted
writes to read-only registers are ignored and do not terminate with an error. Unless noted
otherwise, writes to the programming model must match the size of the register; for
example, an n-bit register only supports n-bit writes, etc. Attempted writes of a different size
than the register width produce an error termination of the bus cycle and no change to the
targeted register.
PBRIDGE
INTC
ips_supervisor_access
ECSM_REG_PROTECTION
ECSM
STM
SWT
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