ST SPC560P34 User Manual

Cross Triggering Unit (CTU) RM0046
610/936 Doc ID 16912 Rev 5
Figure 307. Scheduler subunit
24.4.1 ADC commands list
The ADC can be controlled by the CPU (CPU Control Mode) and by the CTU (CTU Control
Mode). The CTU can control the ADC by sending an ADC command only when the ADC is
in CTU control mode. During the CTU control mode, the CPU is able to write to the ADC
registers but it can not start a new conversion. A control bit is allowed to select from the
classic interface of the CTU control mode. Once selected, no change is possible unless a
reset occurs.
The SU uses a Commands List in order to select the command to send to the ADC when a
trigger event occurs. The commands list can hold twenty-four 16-bit commands (see
Section 24.4.2, “ADC commands list format) and it is double-buffered, that is, the
commands list can be updated at any time between two consecutive MRS, but the changes
become workable only after the next MRS occurs, and a correct reload is performed. In
order to manage the commands list, 5 bits are available in the CLCRx (ADC Commands List
Control Register x), for the position of the first command in the list of commands for each
trigger event. The number of commands piloted by the same trigger event is defined directly
in the commands list. For each command, a bit defines whether or not it is the first command
of a commands list.
24.4.2 ADC commands list format
The CTU can be interfaced with two ADCs, supporting the Single Conversion Mode and the
Dual Conversion Mode.
In Single Conversion Mode only one ADC starts a conversion at a time. In Dual Conversion
Mode both ADCs start a conversion at the same time; in particular both the ADC
CTU Clock
TRIGGER_0
ETIMER0_TRG
Prescaler
ADC Commands List Registers
(double-buffered)
ADC Commands List Control
Registers (double-buffered)
ADC Command
Generator
Trigger
Handler
(1, 2, 3, 4)
Subunit Clock
Subunit Clock
Tr i gge r 0. .7
MRS
eT1 Trigger
Generator
eT2 Trigger
Generator
Ext. Trigger
Generator
FIFOs
Subunit
Clock
Tr ig ge r
0..7
ETIMER1_TRG
EXT_TRG
FIFO_0
FIFO_1
TRIGGER_1
ADC_CMD_1
ADC_CMD_0
NEXT_CMD_1
NEXT_CMD_0
Ready
Ready
Trigger Handler Control Register
(double-buffered)
Ready
Ready

ST SPC560P34 Specifications

General

Brand	ST
Model	SPC560P34
Category	Microcontrollers
Language	English