ST SPC560P34 - Table 166. UMISR4 Field Descriptions; Table 167. NVPWD0 Field Descriptions; Figure 171. Non-Volatile Private Censorship Password 0 Register (NVPWD0)

RM0046 Flash Memory
Doc ID 16912 Rev 5 367/936
Non-Volatile Private Censorship Password 0 register (NVPWD0)
The Non-Volatile Private Censorship Password 0 register (NVPWD0) contains the 32 LSB of
the password used to validate the Censorship information contained in NVSCI0–1 registers.
Note: This register is not implemented on the data Flash block.
Non-Volatile Private Censorship Password 1 register (NVPWD1)
The Non-Volatile Private Censorship Password 1 Register (NVPWD1) contains the 32 MSB
of the password used to validate the Censorship information contained in NVSCI0–1
registers.
Note: This register is not implemented on the data Flash block.
Table 166. UMISR4 field descriptions
Field Description
MS[159:128]
0:31
Multiple Input Signature 159:128
These bits represent the MISR value obtained accumulating:
– MS[135:128]—8 ECC bits for the even double word
– MS138—Single ECC error detection for even double word
– MS139—Double ECC error detection for even double word
– MS[151:144]—8 ECC bits for the odd double word
– MS154—Single ECC error detection for odd double word
– MS155—Double ECC error detection for odd double word
The MS can be seeded to any value by writing the UMISR4 register.
Figure 171. Non-Volatile private Censorship Password 0 register (NVPWD0)
Address: 0x20_3DD8 Access: User read/write
0123456789101112131415
R
PWD
31
PWD
30
PWD
29
PWD
28
PWD
27
PWD
26
PWD
25
PWD
24
PWD
23
PWD
22
PWD
21
PWD
20
PWD
19
PWD
18
PWD
17
PWD
16
W
Reset1111111011101101
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PWD
15
PWD
14
PWD
13
PWD
12
PWD
11
PWD
10
PWD
9
PWD
8
PWD
7
PWD
6
PWD
5
PWD
4
PWD
3
PWD
2
PWD
1
PWD
0
W
Reset1111101011001110
Table 167. NVPWD0 field descriptions
Field Description
PWD[31:0]
0:31
Password 31–0
The PWD[31:0] bits represent the 32 LSB of the private censorship password.