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ST SPC560P34 - Table 173. Bits Manipulation: Double Words with the same ECC Value

ST SPC560P34
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RM0046 Flash Memory
Doc ID 16912 Rev 5 379/936
ECC algorithms
The Flash macrocell supports the ECC algorithm “All 1s No Error”.
All 1s No Error
The All 1s No Error algorithm detects as valid any double word read on a just erased sector
(all the 72 bits are 1s).
This option allows performing a Blank Check after a Sector Erase operation.
EEPROM emulation
The chosen ECC algorithm allows some bit manipulations so that a Double Word can be
rewritten several times without needing an erase of the sector. This allows to use a Double
Word to store flags useful for the EEPROM emulation.
As an example the chosen ECC algorithm allows to start from an All ‘1’s Double Word value
and rewrite whichever of its four 16-bit Half-Words to an All ‘0’s content by keeping the same
ECC value.
Table 173 shows a set of Double Words sharing the same ECC value.
When some Flash sectors are used to perform an EEPROM emulation, it is recomended for
safety reasons to reserve at least three sectors for this purpose.
Protection strategy
Two kinds of protection are available: Modify Protection to avoid unwanted program/erase in
Flash sectors, and Censored mode to avoid piracy.
Table 173. Bits manipulation: double words with the same ECC value
Double word ECC value – All 1s No Error
0xFFFF_FFFF_FFFF_FFFF 0xFF
0xFFFF_FFFF_FFFF_0000 0xFF
0xFFFF_FFFF_0000_FFFF 0xFF
0xFFFF_0000_FFFF_FFFF 0xFF
0x0000_FFFF_FFFF_FFFF 0xFF
0xFFFF_FFFF_0000_0000 0xFF
0xFFFF_0000_FFFF_0000 0xFF
0x0000_FFFF_FFFF_0000 0xFF
0xFFFF_0000_0000_FFFF 0xFF
0x0000_FFFF_0000_FFFF 0xFF
0x0000_0000_FFFF_FFFF 0xFF
0xFFFF_0000_0000_0000 0xFF
0x0000_FFFF_0000_0000 0xFF
0x0000_0000_0000_0000 0xFF

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