ST SPC560P34 - Table 247. LINIBRR Field Descriptions; Table 248. Integer Baud Rate Selection; Figure 245. LIN Integer Baud Rate Register (LINIBRR)

LIN Controller (LINFlex) RM0046
508/936 Doc ID 16912 Rev 5
LIN integer baud rate register (LINIBRR)
Figure 245. LIN integer baud rate register (LINIBRR)
Offset: 0x0028 Access: User read/write
0123456789101112131415
R 0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 000
DIV_M
W
Reset0000000000000000
Table 247. LINIBRR field descriptions
Field Description
DIV_M
LFDIV mantissa
This field defines the LINFlex divider (LFDIV) mantissa value (see Table 248). This field can be
written in Initialization mode only.
Table 248. Integer baud rate selection
DIV_M[0:12] Mantissa
0x0000 LIN clock disabled
0x0001 1
... ...
0x1FFE 8190
ox1FFF 8191