Flash Memory RM0046
330/936 Doc ID 16912 Rev 5
17.3 Flash memory
17.3.1 Introduction
The Flash module provides electrically programmable and erasable non-volatile memory
(NVM), which may be used for instruction and/or data storage.
The Flash module is arranged as two functional units: the Flash core and the memory
interface.
The Flash core is composed of arrayed non-volatile storage elements, sense amplifiers, row
decoders, column decoders and charge pumps. The arrayed storage elements in the Flash
core are sub-divided into physically separate units referred to as blocks (or sectors).
The memory interface contains the registers and logic which control the operation of the
Flash core. The memory interface is also the interface between the Flash module and a bus
interface unit (BIU), and may contain the ECC logic and redundancy logic. The BIU
connects the Flash module to a system bus.
The SPC560P40/34 provides two Flash modules: one 256 KB code Flash module, and one
64 KB data module.
17.3.2 Main features
● High read parallelism (128 bits)
● Error Correction Code (SEC-DED) to enhance data retention
● Double word program (64 bits)
● Sector erase
● Single bank architecture
– Read-While-Modify not available within an individual module
– Read-While-Modify can be performed between the two Flash modules
● Erase suspend available (program suspend not available)
● Software programmable program/erase protection to avoid unwanted writes
● Censored mode against piracy
● Shadow Sector available on code Flash module
17.3.3 Block diagram
Data Flash
The data Flash module contains one module, composed of a Single Bank: Bank 0, normally
used for code storage. No Read-While-Modify operations are possible.
The Modify operations are managed by an embedded Flash Program/Erase Controller
(FPEC). Commands to the FPEC are given through a user registers interface.
The read data bus is 32 bits wide, while the data Flash registers are on a separate 32-bit
wide bus.
The high voltages needed for Program/Erase operations are internally generated.
Figure 151 shows the data Flash module structure.
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