RM0046 Enhanced Direct Memory Access (eDMA)
Doc ID 16912 Rev 5 417/936
18.7.4 DMA arbitration mode considerations
Fixed-channel arbitration
In this mode, the channel service request from the highest priority channel is selected to
execute. The advantage of this scenario is that latency can be small for channels that need
to be serviced quickly. Preemption is available in this scenario only.
Fixed-group arbitration, round-robin channel arbitration
Channels are serviced starting with the highest channel number and rotating through to the
lowest channel number without regard to the channel priority levels assigned within the
group.
18.7.5 DMA transfer
Single request
To perform a simple transfer of ‘n’ bytes of data with one activation, set the major loop to 1
(TCD.CITER = TCD.BITER = 1). The data transfer begins after the channel service request
is acknowledged and the channel is selected to execute. After the transfer completes, the
TCD.DONE bit is set and an interrupt is generated if correctly enabled.
For example, the following TCD entry is configured to transfer 16 bytes of data. The eDMA is
programmed for one iteration of the major loop transferring 16 bytes per iteration. The
source memory has a byte-wide memory port located at 0x1000. The destination memory
has a word-wide port located at 0x2000. The address offsets are programmed in increments
DMA_MUX_CHCONFIG6_SOURCE 6 DMA_MUX.CHCONFIG6[SOURCE] DMA MUX channel 6 source
DMA_MUX_CHCONFIG7_SOURCE 7 DMA_MUX.CHCONFIG7[SOURCE] DMA MUX channel 7 source
DMA_MUX_CHCONFIG8_SOURCE 8 DMA_MUX.CHCONFIG8[SOURCE] DMA MUX channel 8 source
DMA_MUX_CHCONFIG9_SOURCE 9 DMA_MUX.CHCONFIG9[SOURCE] DMA MUX channel 9 source
DMA_MUX_CHCONFIG10_SOURCE 10 DMA_MUX.CHCONFIG10[SOURCE] DMA MUX channel 10 source
DMA_MUX_CHCONFIG11_SOURCE 11 DMA_MUX.CHCONFIG11[SOURCE] DMA MUX channel 11 source
Table 197. DMA request summary for eDMA (continued)
DMA Request Ch. Source Description
To Next Page
Loading...
