ST SPC560P34 - Figure 72. Destructive Event Reset Disable Register (RGM_DERD); Table 61. Destructive Event Reset Disable Register (RGM_DERD) Field Descriptions

RM0046 Reset Generation Module (MC_RGM)
Doc ID 16912 Rev 5 197/936
Destructive Event Reset Disable Register (RGM_DERD)
This register provides dedicated bits to disable particular destructive reset sources. It can be
accessed in read-only in supervisor mode, test mode, and user mode.
Figure 72. Destructive Event Reset Disable Register (RGM_DERD)
Address 0xC3FE_4006 Access: User read, Supervisor read, Test read
0123456789101112131415
R000000000
D_LVD27_IO
D_LVD27_FLASH
D_LVD27_VREG
0
D_SWT
0
D_LVD12
W
POR0000000000000000
Table 61. Destructive Event Reset Disable Register (RGM_DERD) Field Descriptions
Field Description
D_LVD27_IO
Disable 2.7V low-voltage detected (I/O)
0 A 2.7V low-voltage detected (I/O) event triggers a reset sequence
D_LVD27_FLASH
Disable 2.7V low-voltage detected (flash)
0 A 2.7V low-voltage detected (flash) event triggers a reset sequence
D_LVD27_VREG
Disable 2.7V low-voltage detected (VREG)
0 A 2.7V low-voltage detected (VREG) event triggers a reset sequence
D_SWT
Disable software watchdog timer
0 A software watchdog timer event triggers a reset sequence
D_LVD12
Disable 1.2V low-voltage detected
0 A 1.2V low-voltage detected event triggers a reset sequence