RM0046 Nexus Development Interface (NDI)
Doc ID 16912 Rev 5 881/936
Table 463 provides bit definitions for the Debug Status Register.
Table 463. DBSR Bit Definitions
Bit(s) Name Description
0IDE
Imprecise Debug Event
Set to ‘1’ if MSR
DE
=0, DBCR0
IDM
=1 and a debug event causes its respective Debug
Status Register bit to be set to ‘1’. If DBERC0
IDM
=0, it may also be set to ‘1’ if
DBCR0
EDM
=1 and an imprecise debug event occurs due to a DAC event on a load or
store which is terminated with errorIf DBCR0
EDM
=1 and DBERC0
IDM
=1, this bit is “owned”
by software. The hardware debugger will not be informed directly of an imprecise event.
1 UDE
Unconditional Debug Event
Set to ‘1’ if an Unconditional debug event occurred.
2:3 MRR
Most Recent Reset.
00 – No reset occurred since these bits were last cleared by software
01 – A hard reset occurred since these bits were last cleared by software
10 – Reserved
11 – Reserved
4ICMP
Instruction Complete Debug Event
Set to ‘1’ if an Instruction Complete debug event occurred.
5BRT
Branch Taken Debug Event
Set to ‘1’ if an Branch Taken debug event occurred.
6IRPT
Interrupt Taken Debug Event
Set to ‘1’ if an Interrupt Taken debug event occurred.
7TRAP
Trap Taken Debug Event
Set to ‘1’ if a Trap Taken debug event occurred.
8IAC1
Instruction Address Compare 1 Debug Event
Set to ‘1’ if an IAC1 debug event occurred.
9IAC2
Instruction Address Compare 2 Debug Event
Set to ‘1’ if an IAC2 debug event occurred.
10 IAC3
Instruction Address Compare 3 Debug Event
Set to ‘1’ if an IAC3 debug event occurred.
11 IAC4
Instruction Address Compare 4 Debug Event
Set to ‘1’ if an IAC4 debug event occurred.
12 DAC1R
Data Address Compare 1 Read Debug Event
Set to ‘1’ if a read-type DAC1 debug event occurred while DBCR0
DAC1
=0b10 or
DBCR0
DAC1
=0b11
13 DAC1W
Data Address Compare 1 Write Debug Event
Set to ‘1’ if a write-type DAC1 debug event occurred while DBCR0
DAC1
=0b01 or
DBCR0
DAC1
=0b11
14 DAC2R
Data Address Compare 2 Read Debug Event
Set to ‘1’ if a read-type DAC2 debug event occurred while DBCR0
DAC2
=0b10 or
DBCR0
DAC2
=0b11
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