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ST SPC560P34 - Table 305. CTR Field Descriptions; Figure 296. Conversion Timing Registers CTR[0]

ST SPC560P34
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RM0046 Analog-to-Digital Converter (ADC)
Doc ID 16912 Rev 5 599/936
23.4.6 Conversion Timing Registers CTR[0]
CTR0 = associated to internal precision channels (from 0 to 15)
23.4.7 Mask registers
Introduction
The Mask registers are used to program the 16 input channels that are converted during
Normal and Injected conversion.
Normal Conversion Mask Registers (NCMR[0])
NCMR0 = Enable bits of normal sampling for channel 0 to 15 (precision channels)
Figure 296. Conversion Timing Registers CTR[0]
Address:
Base + 0x0094 (CTR0) Access: User read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
INPLATCH
0
OFFSHIFT
0
INPCMP
0
INPSAMP
W
Reset0000001000000101
Table 305. CTR field descriptions
Field Description
INPLATCH Configuration bit for latching phase duration
OFFSHIFT
Configuration for offset shift characteristic
00 No shift (that is the transition between codes 000h and 001h) is reached when the A
VIN
(analog input voltage) is equal to 1 LSB.
01 Transition between code 000h and 001h is reached when the A
VIN
is equal to1/2 LSB
10 Transition between code 00h and 001h is reached when the A
VIN
is equal to 0
11 Not used
Available only on CTR0
INPCMP Configuration bits for comparison phase duration
INPSAMP Configuration bits for sampling phase duration

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