ST SPC560P34 - Register Description

Mode Entry Module (MC_ME) RM0046
146/936 Doc ID 16912 Rev 5
6.3.2 Register Description
Unless otherwise noted, all registers may be accessed as 32-bit words, 16-bit half-words, or
8-bit bytes. The bytes are ordered according to big endian. For example, the ME_RUN_PC0
register may be accessed as a word at address 0xC3FD_C080, as a half-word at address
0xC3FD_C082, or as a byte at address 0xC3FD_C083.
0xC3FD
_C068
ME_PS2
R000
S_PIT
0000000 00000
W
R0 0 0 0 0000000 00000
W
0xC3FD
_C06C
reserved
0xC3FD
_C070
reserved
0xC3FD
_C074
…
0xC3FD
_C07C
reserved
0xC3FD
_C080
…
0xC3FD
_C09C
ME_RUN_PC
0…7
R0 0 0 0 0000000 00000
W
R0 0 0 0 0000
RUN3 RUN2 RUN1 RUN0
DRUN
SAFE
TEST
RESET
W
0xC3FD
_C0A0
…
0xC3FD
_C0BC
ME_LP_PC0
…7
R0 0 0 0 0000000 00000
W
R00000
STOP0
0
HALT0
00000000
W
0xC3FD
_C0C0
…
0xC3FD
_C14C
ME_PCTL0…
143
R0
DBG_F
LP_CFG RUN_CFG
0
DBG_F
LP_CFG RUN_CFG
W
R0
DBG_F
LP_CFG RUN_CFG
0
DBG_F
LP_CFG RUN_CFG
W
0xC3FD
_C150
…
0xC3FD
_FFFC
reserved
Table 38. MC_ME Memory Map (continued)
Address Name
0 1 2 3 4567891011 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31