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ST SPC560P34 - Functional Description

ST SPC560P34
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RM0046 DMA Channel Mux (DMA_MUX)
Doc ID 16912 Rev 5 429/936
19.5 Functional description
This section provides a complete functional description of the DMA Mux. The primary
purpose of the DMA Mux is to provide flexibility in the system’s use of the available DMA
channels. As such, configuration of the DMA Mux is intended to be a static procedure done
during execution of the system boot code. However, if the procedure outlined in
Section 19.6.2, “Enabling and configuring sources is followed, the configuration of the DMA
Mux may be changed during the normal operation of the system.
Functionally, the DMA Mux channels may be divided into two classes: Channels that
implement the normal routing functionality plus periodic triggering capability, and channels
that implement only the normal routing functionality.
19.5.1 DMA channels with periodic triggering capability
Besides the normal routing functionality, the first four channels of the DMA Mux provide a
special periodic triggering capability that can be used to provide an automatic mechanism to
transmit bytes, frames or packets at fixed intervals without the need for processor
intervention. The trigger is generated by the Periodic Interrupt Timer (PIT); as such, the
configuration of the periodic triggering interval is done via configuration registers in the PIT.
Please refer to 30, “Periodic Interrupt Timer (PIT) for more information on this topic.
Note: Because of the dynamic nature of the system (i.e., DMA channel priorities, bus arbitration,
interrupt service routine lengths, etc.), the number of clock cycles between a trigger and the
actual DMA transfer cannot be guaranteed.

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