ST SPC560P34 - Figure 74. Functional Event Short Sequence Register (RGM_FESS); Table 63. Functional Event Short Sequence Register (RGM_FESS) Field Descriptions

RM0046 Reset Generation Module (MC_RGM)
Doc ID 16912 Rev 5 199/936
Functional Event Short Sequence Register (RGM_FESS)
This register defines which reset sequence will be done when a functional reset sequence is
triggered. The functional reset sequence can either start from PHASE1 or from PHASE3,
skipping PHASE1 and PHASE2.
Note: This could be useful for fast reset sequence, for example to skip flash reset.
It can be accessed in read/write in either supervisor mode or test mode. It can be accessed
in read in user mode.
Figure 74. Functional Event Short Sequence Register (RGM_FESS)
Address 0xC3FE_4018 Access: User read, Supervisor read/write, Test read/write
0123456789101112131415
R
SS_EXR
00000
SS_PLL1
SS_FLASH
SS_LVD45
SS_CMU0_FHL
SS_CMU0_OLR
SS_PLL0
SS_CHKSTOP
SS_SOFT
SS_CORE
SS_JTAG
W
POR0000000000000000
Table 63. Functional Event Short Sequence Register (RGM_FESS) Field Descriptions
Field Description
SS_EXR
Short Sequence for External Reset
0 The reset sequence triggered by an external reset event will start from PHASE1
SS_PLL1
Short Sequence for PLL1 fail
0 The reset sequence triggered by a PLL1 fail event will start from PHASE1
1 The reset sequence triggered by a PLL1 fail event will start from PHASE3, skipping PHASE1
and PHASE2
SS_FLASH
Short Sequence for code or data flash fatal error
0 The reset sequence triggered by a code or data flash fatal error event will start from PHASE1
SS_LVD45
Short Sequence for 4.5V low-voltage detected
0 The reset sequence triggered by a 4.5V low-voltage detected event will start from PHASE1
1 The reset sequence triggered by a 4.5V low-voltage detected event will start from PHASE3,
skipping PHASE1 and PHASE2
SS_CMU0_FHL
Short Sequence for CMU0 clock frequency higher/lower than reference
0 The reset sequence triggered by a CMU0 clock frequency higher/lower than reference event
will start from PHASE1
1 The reset sequence triggered by a CMU0 clock frequency higher/lower than reference event
will start from PHASE3, skipping PHASE1 and PHASE2
SS_CMU0_OLR
Short Sequence for oscillator frequency lower than reference
0 The reset sequence triggered by a oscillator frequency lower than reference event will start
from PHASE1
1 The reset sequence triggered by a oscillator frequency lower than reference event will start
from PHASE3, skipping PHASE1 and PHASE2