ST SPC560P34 - Table 309. CDR Field Descriptions; Figure 300. Channel Data Registers (CDR[0

Analog-to-Digital Converter (ADC) RM0046
602/936 Doc ID 16912 Rev 5
Figure 300. Channel Data Registers (CDR[0..26])
Address: See Table 294 Access: User read/write
0123456789101112131415
R00000000 0000
VALID
OVERW
RESULT
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R000000
CDATA[0:9]
(MCR[WLSIDE] = 0)
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CDATA[0:9]
(MCR[WLSIDE] = 1)
000000
W
Reset0000000000000000
Table 309. CDR field descriptions
Field Description
VALID
Used to notify when the data is valid (a new value has been written). It is automatically cleared when
data is read.
OVERW
Overwrite data
This bit signals that the previous converted data has been overwritten by a new conversion. This
functionality depends on the value of MCR[OWREN]:
– When OWREN = 0, then OVERW is frozen to 0 and CDATA field is protected against being
overwritten until being read.
– When OWREN = 1, then OVERW flags the CDATA field overwrite status.
0 Converted data has not been overwritten
1 Previous converted data has been overwritten before having been read
RESULT
This bit reflects the mode of conversion for the corresponding channel.
00 Data is a result of Normal conversion mode
01 Data is a result of Injected conversion mode
10 Data is a result of CTU conversion mode
11 Reserved
CDATA
Channel 0-15 converted data. Depending on the value of the MCR[WLSIDE] bit, the position of this
field can be changed as shown in Figure 300.