ST SPC560P34 - Figure 474. CRC Input Register (CRC_INP); Table 431. CRC_INP Field Descriptions

RM0046 Cyclic Redundancy Check (CRC)
Doc ID 16912 Rev 5 801/936
32.5.2 CRC Input Register (CRC_INP)
30
SWAP: SWAP selection
0: No swap selection applied on the CRC_OUTP content
1: Swap selection (MSB -> LSB, LSB -> MSB) applied on the CRC_OUTP content. In case of CRC-
CCITT polynomial the swap operation is applied on the 16 LSB bits.
This bit can be read and written by the software.
This bit can be written only during the configuration phase.
31
INV: INV selection
0: No inversion selection applied on the CRC_OUTP content
1: Inversion selection (bit x bit) applied on the CRC_OUTP content. In case of CRC-CCITT polynomial
the inversion operation is applied on the 16 LSB bits.
This bit can be read and written by the software.
This bit can be written only during the configuration phase.
Table 430. CRC_CFG field descriptions (continued)
Field Description
Figure 474. CRC Input Register (CRC_INP)
Address:
Context 1: Base + 0x0004
Context 2: Base + 0x0014
Access: User read/write
0123456789101112131415
R
INP
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
INP
W
Reset0000000000000000
Table 431. CRC_INP field descriptions
Field Description
0:31
INP: Input data for the CRC computation
The INP register can be written at byte, half-word (high and low) or word in any sequence. In case of
half-word write operation, the bytes must be contiguous.
This register can be read and written by the software.