FlexPWM RM0046
658/936 Doc ID 16912 Rev 5
Value register 3 (VAL3)
The 16-bit signed value in this register defines the count value to set PWMA low
(Figure 334). This register is not byte accessible.
Note: The VAL3 register is buffered. The value written does not take effect until the LDOK bit is set
and the next PWM load cycle begins. VAL3 cannot be written when LDOK is set. Reading
VAL3 reads the value in a buffer and not necessarily the value the PWM generator is
currently using.
Value register 4 (VAL4)
The 16-bit signed value in this register defines the count value to set PWMB high
(Figure 334). This register is not byte accessible.
Note: The VAL4 register is buffered. The value written does not take effect until the LDOK bit is set
and the next PWM load cycle begins. VAL4 cannot be written when LDOK is set. Reading
VAL4 reads the value in a buffer and not necessarily the value the PWM generator is
currently using.
Figure 342. Value register 3 (VAL3)
Address:
Base + 0x000E (Submodule 0)
Base + 0x005E (Submodule 1)
Base + 0x00AE (Submodule 2)
Base + 0x00FE (Submodule 3) Access: User read/write
0123456789101112131415
R
VAL3
W
Reset0000000000000000
Figure 343. Value register 4 (VAL4)
Address:
Base + 0x0010 (Submodule 0)
Base + 0x0060 (Submodule 1)
Base + 0x00B0 (Submodule 2)
Base + 0x0100 (Submodule 3) Access: User read/write
0123456789101112131415
R
VAL4
W
Reset0000000000000000
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