ST SPC560P34 - Table 164. UMISR2 Field Descriptions; Figure 168. User Multiple Input Signature Register 2 (UMISR2)

RM0046 Flash Memory
Doc ID 16912 Rev 5 365/936
User Multiple Input Signature Register 2 (UMISR2)
The Multiple Input Signature Register (UMISR2) provides a mean to evaluate the array
integrity. UMISR2 represents the bits 95-64 of the whole 144-bit word (2 double words
including ECC).
UMISR2 is not accessible whenever MCR[DONE] or UT0[AID] are low. Reads return
indeterminate data. Writes have no effect.
Note: This register is not implemented on the data Flash block.
User Multiple Input Signature Register 3 (UMISR3)
The Multiple Input Signature Register 3 (UMISR3) provides a means to evaluate the array
integrity. UMISR3 represents bits 127:96 of the whole 144-bit word (2 double words
including ECC).
UMISR3 is not accessible whenever MCR[DONE] or UT0[AID] are low. Reads return
indeterminate data. Writes have no effect.
Note: This register is not implemented on the data Flash block.
Figure 168. User Multiple Input Signature Register 2 (UMISR2)
Address: Base + 0x0050 Access: User read/write
0123456789101112131415
R
MS
095
MS
094
MS
093
MS
092
MS
091
MS
090
MS
089
MS
088
MS
087
MS
086
MS
085
MS
084
MS
083
MS
082
MS
081
MS
080
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
MS
079
MS
078
MS
077
MS
076
MS
075
MS
074
MS
073
MS
072
MS
071
MS
070
MS
069
MS
068
MS
067
MS
066
MS
065
MS
064
W
Reset0000000000000000
Table 164. UMISR2 field descriptions
Field Description
MS[095:064]
0:31
Multiple input Signature 095–064
These bits represent the MISR value obtained by accumulating the bits 95:64 of all the pages
read from the Flash memory.
The MS can be seeded to any value by writing the UMISR2 register.