ST SPC560P34 - Table 84. DEBUGPORT Field Descriptions; Table 85. Debug Status Port Modes; Figure 93. Debug Status Port (DEBUGPORT) Register

RM0046 System Status and Configuration Module (SSCM)
Doc ID 16912 Rev 5 245/936
Debug Status Port (DEBUGPORT) register
The Debug Status Port register provides debug data on a set of pins.
Figure 93. Debug Status Port (DEBUGPORT) register
Address: Base + 0x0008 Access: User read/write
0123456789101112131415
R0000000000000
DEBUG_MODE
[2:0]
W
Reset0000000000000000
Table 84. DEBUGPORT field descriptions
Field Description
13-15
DEBUG_MODE[2:0]
Debug Status Port Mode
This field selects the alternate debug functionality for the Debug Status Port.
000: No alternate functionality selected
001: Mode 1 selected
010: Mode 2 selected
011: Mode 3 selected
100: Mode 4 selected
101: Mode 5 selected
110: Mode 6 selected
111: Mode 7 selected
Tabl e 85 describes the functionality of the Debug Status Port in each mode.
Table 85. Debug Status Port modes
Pin
(1)
Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7
0 STATUS[0] STATUS[8] MEMCONFIG[0] MEMCONFIG[8] Reserved Reserved Reserved
1 STATUS[1] STATUS[9] MEMCONFIG[1] MEMCONFIG[9] Reserved Reserved Reserved
2 STATUS[2] STATUS[10] MEMCONFIG[2] MEMCONFIG[10] Reserved Reserved Reserved
3 STATUS[3] STATUS[11] MEMCONFIG[3] MEMCONFIG[11] Reserved Reserved Reserved
4 STATUS[4] STATUS[12] MEMCONFIG[4] MEMCONFIG[12] Reserved Reserved Reserved
5 STATUS[5] STATUS[13] MEMCONFIG[5] MEMCONFIG[13] Reserved Reserved Reserved
6 STATUS[6] STATUS[14] MEMCONFIG[6] MEMCONFIG[14] Reserved Reserved Reserved
7 STATUS[7] STATUS[15] MEMCONFIG[7] MEMCONFIG[15] Reserved Reserved Reserved
1. All signals are active high, unless otherwise noted